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STMicroelectronics launches a PLP pilot line in Tours
STMicroelectronics announced the introduction of a new generation of Panel-Level Packaging (PLP) technology with the launch of a pilot line in Tours, scheduled for the third quarter of 2026. This project is part of a strategy to improve the efficiency and flexibility of chip assembly and testing processes. A $60 million investment supports this initiative, which will benefit from synergies with the local R&D ecosystem.
This advanced technology enables multiple integrated circuits to be packaged on a rectangular panel, optimizing large-scale production and reducing costs. The Direct Copper Interconnect (DCI) approach promises increased performance, facilitating miniaturization and power density. ST aims to expand the use of PLP in the automotive, industrial, and consumer sectors to strengthen its technological leadership.
R. E.
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